A limiter is often used at the front end of a baseband receiver to limit the fluctuations in the amplitude of the input signal applied thereto. In a coherent receiver employing a phase lock loop (PLL), the loop bandwidth is a function of the input power, and any fluctuation of this power causes a fluctuation in loop bandwidth. With no limiter, the signal and noise range may vary over several orders of magnitude, damaging loop components, especially the phase detector (multiplier). Baseband signal processors not having PLL's still use limiters when a compromise has to be made between poorer resolution while covering the full range and limiting the range to achieve better resolution.
Conventional limiters are analog, wherein the amplitude limiting is achieved by limiting the DC voltage level applied to processing circuits. This causes unwanted distortion due to nonlinear circuit operation and drift of component parameters because of temperature changes and aging.
U.S. Pat. No. 3,883,817 discloses an analog limiter 86 having only two output levels, i.e., it is a "hard" limiter. On the other hand, the present invention is a digital limiter; and it resolves the input signal to 2.sup.n levels, where n is arbitrary, i.e., it is a "soft" limiter.
U.S. Pat. No. 4,263,565 describes another example of an analog limiter.
U.S. Pat. No. 4,412,299 discloses two limiters 10, 11, which, "in a conventional manner, square the wave shape of the high and low frequency components of the incoming signals before they are applied to the tone receiver 12". Col. 5, lines 49-52.